Double throughput analog to digital converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S136000

Reexamination Certificate

active

06870495

ABSTRACT:
A pipelined analog-to-digital converter features an amplifier block that includes a switching network to implement a double sampling and double conversion principle of operation. The amplifier block utilizes both phases of a clock for sampling and conversion. Additionally, each stage of the analog-to-digital converter is associated with two independent processing blocks. The analog-to-digital converter can achieve double throughput for approximately the same level of power consumption. Alternatively, throughput may be maintained, but the gain-bandwidth of the amplifier block may be reduced by half, thereby halving the DC bias current consumed by the amplifier. Additionally, the output signal of the amplifier itself is not reset to a common mode voltage.

REFERENCES:
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patent: 6078276 (2000-06-01), Signell et al.
patent: 6313779 (2001-11-01), Leung et al.
patent: 6400220 (2002-06-01), Wang et al.
patent: 6707405 (2004-03-01), Kuttner
patent: 6753801 (2004-06-01), Rossi
patent: 20040036453 (2004-02-01), Rossi
“Understanding Pipelined ADCs”, Maxim Integrated Products, www.maxim-ic.com/appnotes.cfm/appnote_number/383, 2003.
Brian Black, “Analog-to-Digital Converter Architectures and Choices for System Design”, Analog Dialogue 33-8 (1999).

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