Double-sided wafer exposure method and device

Geometrical instruments – Gauge – Template

Reexamination Certificate

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Details

C033S553000, C033S566000

Reexamination Certificate

active

06460265

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to methods for exposing both sides of a semiconductor wafer such that the exposure patterns on both sides of the wafer may be aligned. The present invention also relates to devices for forming aligned markings on a semiconductor wafer as well as methods for making the device.
BACKGROUND OF THE INVENTION
To accommodate more features on a single chip, future chip technologies may require multi-functional chip macros on a single chip. Such requirements often tend to create larger chips, which may in turn suffer from chip yield and optimal performance problems. One method for addressing these problems is the “precision aligned macro” concept discussed in U.S. Pat. Nos. 5,770,884 and 5,814,885, the entire contents of the disclosures of which are hereby incorporated by reference.
However, the precision aligned macro concept typically requires aligned top surface and backside exposure patterns. Producing aligned patterns on both sides of a wafer may require a double-sided exposure of the wafer to realize the alignment of patterns on the front with those on the back sides of the wafer.
Although exposure tools exist to create such aligned patterns on the front and back side of the wafer, they are not readily available in production lines. As a result, such exposure tools need to be off the production line and require wafers to be moved off line for processing. Additionally, the tools may be very expensive.
According to one example, a method for creating aligned exposure patterns on the front and backside of a wafer requires a double-sided exposure or an infrared transmission exposure lithography tool. Both of these types of tools can be expensive. Additionally, these tools are not readily available in the production line.
Another method currently utilized to expose both sides of a semiconductor wafer includes pairing masks or flipping two masks and wafer combinations to expose the back of wafers. According to this method, two different photolithography masks are provided. The two masks are arranged opposite each other in an exposure device and then aligned. The wafer is then inserted between the masks. One side of the wafer is exposed. Then, the radiation source utilized in the exposure tool or, alternatively, a mirror system, are fliped to direct the radiation through the other mask to expose the other side of the wafer.
SUMMARY OF THE INVENTION
The present invention solves these and other problems by providing a simple method and apparatus that may utilize conventional exposure tools. Accordingly, aspects of the present invention provide a device for creating at least one aligned marking on opposite sides of a semiconductor wafer including a front side and backside. The device includes a wafer receiving support unit including at least a first wafer receiving slot and a first sidewall thereof for receiving a semiconductor wafer inserted therein. The device also includes a template for positioning at least one aligned marking on each of the front side of the semiconductor wafer and the backside of the semiconductor wafer.
Additional aspects of the present invention provide a method for forming a device for creating aligned markings on opposite sides of a semiconductor wafer including a front side and a backside. The method includes providing a semiconductor wafer receiving support unit having a top wall, a bottom wall, and four side walls. At least one wafer receiving slot is provided and at least one of the side walls of the support unit. A template is provided on the support unit for positioning aligned markings on the front side of the semiconductor wafer and the backside of the semiconductor wafer.
Further aspects of the present invention provide a method for forming aligned markings on opposite sides of a semiconductor wafer including a front side and a backside. The method includes providing a wafer receiving support unit including a top wall, a bottom wall, four side walls, at least one wafer receiving slot and at least one of the side walls, the template for positioning aligned markings on the front side of the semiconductor wafer and on the backside of the semiconductor wafer. A semiconductor wafer is inserted into the at least one wafer receiving slot. The semiconductor wafer is then exposed utilizing the template to create aligned markings on the front side and the backside of the semiconductor wafer.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.


REFERENCES:
patent: 689354 (1901-12-01), Colton
patent: 753005 (1904-02-01), Schantz
patent: 1811121 (1931-06-01), Gastell
patent: 3417472 (1968-12-01), Nelson
patent: 5548372 (1996-08-01), Schroeder et al.
patent: 5604354 (1997-02-01), Lauverjat
patent: 5627378 (1997-05-01), Baxter
patent: 5983477 (1999-11-01), Jacks et al.
patent: 307475 (1918-08-01), None
patent: 2045691 (1980-11-01), None
patent: 0269764 (1929-12-01), None

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