Double-sided cooling isolated packaged power semiconductor...

Details Double-sided cooling isolated packaged power semiconductor... Double-sided cooling isolated packaged power semiconductor...

2006-02-28

2006-02-28

Cao, Phat X. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S688000

Reexamination Certificate

active

07005734

ABSTRACT:
A power device includes a semiconductor die having an upper surface and a lower surface. One or more terminals are coupled to the die. A first substrate is bonded to the upper surface of the die. The first substrate is configured to provide a first heat dissipation path. A second substrate is bonded to the lower surface of the die. The second substrate is configured to provide a second heat dissipation path.

REFERENCES:
patent: 6490161 (2002-12-01), Johnson
patent: 6693350 (2004-02-01), Teshima et al.
patent: 6804883 (2004-10-01), Weiblen et al.
patent: 2002/0043708 (2002-04-01), Muto et al.

Affiliated with

Also associated with

Rating

Double-sided cooling isolated packaged power semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Double-sided cooling isolated packaged power semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Double-sided cooling isolated packaged power semiconductor... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3672637