Double-sampled, time-interleaved analog to digital converter

Details Double-sampled, time-interleaved analog to digital converter Double-sampled, time-interleaved analog to digital converter

2006-07-11

2006-07-11

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

Reexamination Certificate

active

07075471

ABSTRACT:
An apparatus and method for high-speed analog to digital conversion are disclosed. An ADC system includes a plurality of N/2 sub-ADCs, each sub-ADC receiving an analog signal and a clock signal and generating two digital samples at a rate of Fs/N. The two digital samples are generated with approximately 180 degree phase relationship relative to a frequency of Fs/N. The plurality of N/2 sub-ADCs of the time-interleaved ADC system, generate combined output samples at a rate of Fs. An ADC method includes a plurality of N/2 sub-ADCs receiving the analog signal, clocking each sub-ADC at a rate of FS/N. Each sub-ADC generates two digital samples at a rate of FS/(2N), the two digital samples being generated with approximately 180 degree phase relationship relative to a frequency of Fs/N. Outputs of the sub-ADCs are combined to generate digital samples at a rate of Fs.

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Gabriele Manganaro, An Improved Phase Clock Generator for Interleaved and Double-Sampled Switched-Capacitor Circuits, 2001 IEEE.

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