Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-06-29
2009-06-16
Le, Thong Q (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185240, C365S185140, C365S185190
Reexamination Certificate
active
07548462
ABSTRACT:
A method for double programming of multi-level-cell (MLC) programming in a multi-bit-cell (MBC) of a charge trapping memory that includes a plurality of charge trapping memory cells is provided. The double programming method is conducted in two phrases, a pre-program phase and a post-program phase, and applied to a word line (a segment in a word line, a page in a word line, a program unit or a memory unit) of the charge trapping memory. A program unit can be defined by input data in a wide variety of ranges. For example, a program unit can be defined as a portion (such as a page, a group, or a segment) in one word line in which each group is selected for pre-program and pre-program-verify, either sequentially or in parallel with other groups in the same word line.
REFERENCES:
patent: 6331951 (2001-12-01), Bautista et al.
patent: 6529412 (2003-03-01), Chen et al.
patent: 6714457 (2004-03-01), Hsu et al.
patent: 6768673 (2004-07-01), Hsia et al.
patent: 2007/0097749 (2007-05-01), Li et al.
patent: 2007/0140019 (2007-06-01), Yeh et al.
Chang Kuen-Long
Ho Wen-Chiao
Hung Chun-Hsiung
Haynes Beffel & Wolfeld LLP
Le Thong Q
Macronix International Co. Ltd.
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