Boots – shoes – and leggings
Patent
1995-05-26
1997-11-11
Mai, Tan V.
Boots, shoes, and leggings
G06F 700
Patent
active
056871023
ABSTRACT:
A double precision shift operation utilizes a 32 bit data path.
REFERENCES:
patent: 5189319 (1993-02-01), Fung et al.
patent: 5204953 (1993-04-01), Dixit
patent: 5254888 (1993-10-01), Lee et al.
patent: 5259006 (1993-11-01), Price et al.
patent: 5404473 (1995-04-01), Papworth et al.
patent: 5408626 (1995-04-01), Dixit
patent: 5442576 (1995-08-01), Gergen et al.
patent: 5481746 (1996-01-01), Schiffleger et al.
patent: 5528525 (1996-06-01), Suzuki et al.
patent: 5532949 (1996-07-01), Fujihara
Serra, Micaela & Dervisoglu, Bulent I, "Testing", Chapter 79, The Electrical Engineering Handbook, Richard C. Dorf, Editor-in-Chief, pp. 1808-1837, CRC Press.
L-T Wang et al., "Feedback Shift Registers For Self-Testing Circuits", VLSI Systems Design, Dec. 1986.
Masakazu Shoji, "CMOS Dynamic Gates", Chapter 5, AT&T CMOS Digital Circuit Technology, Prentice Hall, 1988, pp. 210-257.
Guthrie, Charles, "Power-On Sequencing For Liquid Crystal Displays; Why, When, And How", Sharp Application Notes, Sharp Corporation, 1994, pp. 2-1 thru 2-9.
Bernd Moeschen, "NS32SP160--Feature Communication Controller Architecture Specification", National Semiconductor, Rev. 1.0, May 13, 1993.
Agarwal, Rakesh K., 80.times.86 Architecture and Programming, vol. II: Architecture Reference, Chapter 4, Prentice Hall, 1991, pp. 542-543.
Intel486 Microprocessor Family Programmer's Reference Manual, Intel Corporation, 1993.
"8237A High Performance Programmable DMA Controller (8237A, 8237A-4, 8237A-5)", Peripheral Components, Intel, 1992, pp. 3-14 thru 3-50.
Kane, Gerry, "R2000 Processor Programming Model", Chapter 2, MIPS RISC Architecture, MIPS Computer Systems, Inc.
Hennessy, John, et al., "Interpreting Memory Addresses", Computer Architecture A Quantitative Approach, pp. 95-97, Morgan Kaufmann Publishers, Inc. 1990.
PowerPC601 Reference Manual, IBM, 1994, Chapter 9, "System Interface Operation", pp. 9-15 thru 9-17.
Intel Corp. Microsoft Corp., Advanced Power Management (APM) BIOS Interface Specification, Revision 1.1, Sep. 1993.
Intel Corporation, i486 Micro Processor Hardware Reference Manual, Processor Bus, pp. 3-28 thru 3-32.
Mai Tan V.
National Semiconductor Corp.
LandOfFree
Double precision (64 bit) shift operations using a 32 bit data p does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Double precision (64 bit) shift operations using a 32 bit data p, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Double precision (64 bit) shift operations using a 32 bit data p will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1233978