Double polycrystalline silicon gate memory device

Details Double polycrystalline silicon gate memory device Double polycrystalline silicon gate memory device

1974-12-30

1976-10-05

Canney, Vincent P.

Communications: electrical

Digital comparator systems

H01L 1114

Patent

active

039848221

ABSTRACT:
A double polycrystalline silicon gate memory device having a floating gate for storing charge and a control gate. The memory device may be used as a single device cell in a memory array. A double self-aligning method is used to form the source and drain regions while doping the gates. Through a predeposition step a lightly doped secondary source and drain regions are formed in alignment with the floating gate prior to the formation of the primary source and drain regions in alignment with the control gate.

REFERENCES:
patent: 3500142 (1970-03-01), Kahng
patent: 3543052 (1970-11-01), Kahng
patent: 3649884 (1972-03-01), Hanetz
patent: 3660819 (1972-05-01), Frohman-Bentchkowsky

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