Fishing – trapping – and vermin destroying
Patent
1994-06-03
1995-07-18
Thomas, Tom
Fishing, trapping, and vermin destroying
437 56, 437919, H01L 218238
Patent
active
054340985
ABSTRACT:
The present invention relates to a double poly MOS structure and a method for polysilicon capacitor formation which allows for independent adjustment of an interpoly oxide layer without affecting thickness of the gate oxide layer. In an exemplary embodiment, a first oxide layer is formed above a polysilicon layer. A second oxide layer is subsequently formed on the substrate to establish a gate oxide in an active area of the transistor. As a result, the interpoly oxide layer is formed by a combination of the first and second oxide formations, while the gate oxide layer is formed by only the second oxide formation. Thus, the thickness of the interpoly oxide layer can be adjusted by increasing or decreasing the thickness of the first oxide formation without changing the thickness of the gate oxide layer.
REFERENCES:
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patent: 4494301 (1985-01-01), Faraone
patent: 4577390 (1986-03-01), Haken
patent: 4639274 (1987-01-01), Krishna
patent: 4735915 (1988-04-01), Kita et al.
patent: 4987091 (1991-01-01), Kotaki
patent: 5104819 (1992-04-01), Freiberger et al.
patent: 5223451 (1993-06-01), Uemura et al.
Thomas Tom
VLSI Techology, Inc.
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