Double patterning with single hard mask

Details Double patterning with single hard mask Double patterning with single hard mask

2011-07-12

2011-07-12

Deo, Duy-Vu N (Department: 1713)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S585000, C438S587000, C438S399000, C438S696000, C430S313000, C430S311000

Reexamination Certificate

active

07977248

ABSTRACT:
In general, in one aspect, a method includes forming a hard mask on a semiconductor substrate. A first resist layer is patterned on the hard mask as a first plurality of lines separated by a first defined pitch. The hard mask is etched to a portion of formed thickness to create a first plurality of fins in alignment with the first plurality of lines and the first resist layer is removed. A second resist layer is patterned on the hard mask as a second plurality of lines separated by a second defined pitch. The second plurality of lines is patterned between the first plurality of lines. The hard mask is etched to the portion of the formed thickness to create a second plurality of fins in alignment with the second plurality of lines. The first plurality of hard mask fins and the second plurality of hard mask fins are interwoven and have same thickness.

REFERENCES:
patent: 6110331 (2000-08-01), Rolfson
patent: 6872647 (2005-03-01), Yu et al.
patent: 2007/0172770 (2007-07-01), Witters et al.

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