Double layer ROM integrated circuit

Details Double layer ROM integrated circuit Double layer ROM integrated circuit

1983-04-26

1986-03-11

Larkins, William D.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 59, 357 41, 357 46, 357 231, 357 45, 365104, 365 94, H01L 2904, H01L 2978, G11C 1140

Patent

active

045757437

ABSTRACT:
A first ROM is comprised of a transistor matrix. The polycrystalline silicon forming the gates of the transistors of the first ROM and another polycrystalline silicon region are arranged in a matrix, and diodes are formed by PN junctions at the crossing points. Thus, a second ROM is comprised of a diode matrix. The two ROMS are formed in layers on one common plane and each ROM can retain different information, independently of each other.

REFERENCES:
patent: 3865651 (1975-02-01), Arita
patent: 4041522 (1977-08-01), Oguey et al.
patent: 4068217 (1978-01-01), Arnett et al.
patent: 4180826 (1979-12-01), Shappir
patent: 4184085 (1980-01-01), Takahashi
patent: 4424579 (1984-01-01), Roesner
patent: 4453175 (1984-06-01), Ariizumi et al.
patent: 4494135 (1985-01-01), Moussie

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