Double-high DIMM with dual registers and related methods

Details Double-high DIMM with dual registers and related methods Double-high DIMM with dual registers and related methods

2007-05-01

2007-05-01

Elms, Richard T. (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S230080, C361S764000, C716S030000

Reexamination Certificate

active

11085693

ABSTRACT:
One memory module includes a printed circuit board comprising an upper row of memory integrated circuits, a lower row of memory integrated circuits, and a first addressing register and a second addressing register, the first addressing register and a second addressing register each having at least one of address and control input routing primarily provided in a first layer, the first addressing register coupled to the upper row of memory integrated circuits and the second addressing register coupled to the lower row of memory integrated circuits.

REFERENCES:
patent: 5686730 (1997-11-01), Laudon et al.
patent: 6751113 (2004-06-01), Bhakta et al.
patent: 6807650 (2004-10-01), Lamb et al.
patent: 7023719 (2006-04-01), Hung et al.
patent: 2003/0090879 (2003-05-01), Doblar et al.
patent: 2003/0223303 (2003-12-01), Lamb et al.
patent: 2004/0201405 (2004-10-01), Bacha et al.
patent: 2004/0268161 (2004-12-01), Ross
patent: 2005/0018495 (2005-01-01), Bhakta et al.
patent: 2005/0183589 (2005-08-01), Salmon
patent: 2006/0137903 (2006-06-01), Sprietsma et al.
patent: 2006/0139983 (2006-06-01), Sprietsma et al.
Philips. Sep. 28, 2004. Philips SSTU32865 Product Data Sheet Rev. 02.
JEDEC. Nov. 2004. JEDEC JESD82-9A Standard: Definition of the SSTU32865 28-bit 1:2 Registered Buffer with Parity for DDR2 RDIMM Applications.
Warner, M. Jun. 22-24, 1998. Micro-ball grid arrays: a practical chip-size packaging solution for nonvolatile memory applications. Nonvolatile Memory Technology Conference. Seventh Biennial IEEE.
Jingan Gao et al. Mar. 15-18, 2005. Micro-BGA package reliability and optimization of reflow soldering profile. Asian Green Electronics 2005.
Wyland, C. et al. Oct. 27-29, 2003. Signal Integrity Study of 1000 Ball Grid Array Package Construction Effects on DDR2533MHz. Electrical Performance of Electronic Packaging 2003.
Crisp, R. Nov./Dec. 1997. Direct Rambus Technology: The New Main Memory Standard. IEEE Micro Vol. 17, Issue 6. pp. 18-28.

Affiliated with

Also associated with

Rating

Double-high DIMM with dual registers and related methods does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Double-high DIMM with dual registers and related methods, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Double-high DIMM with dual registers and related methods will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3786386