Double heterojunction FET with ohmic semiconductor gate and cont

Details Double heterojunction FET with ohmic semiconductor gate and cont Double heterojunction FET with ohmic semiconductor gate and cont

1982-12-30

1986-04-15

Edlow, Martin H.

357 2315, 357 232, 357 16, 357 22, H01L 2978, H01L 29205, H01L 2980

Patent

active

045831050

ABSTRACT:
This invention relates to an improved heterojunction FET. More specifically the invention is directed to a heterojunction FET device in which the contact to the semiconductor gate is ohmic in character. The gate and channel regions of the FET have the same barrier height relative to an intervening third layer of semiconductor and sandwich the third layer of undoped semiconductor. The resulting symmetry of the structure provides a threshold voltage which lies normally near zero volts and is controllable upwardly or downwardly by adding an n or p type dopant to the undoped third layer or region.

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T. Mimura et al, Japanese Journal of Applied Physics, vol. 19, No. 5, May 1980, pp. L225-L227, "A New Field-Effect Transistor with Selectively Doped GaAs
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Drummond et al, "A Novel Normally-Off Camel Diode Gate GaAs FET", Appld. Phys. Ltrs., vol. 40, No. 9, May 1982, pp. 834-836.
Maloney et al, "AlGaAs/GaAs JFETS by Organo-Mettallic and MBE", Electronics Ltrs., vol. 18, No. 3, Feb. 1982, pp. 112-113.
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