Double error correction using single error correcting code

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G06F 1110

Patent

active

043193579

ABSTRACT:
A single error correcting double error detecting (SEC/DED) error correcting code for a memory is used to correct one fixed error and one transitory error in a data word stored in the memory. The erroneous data word and syndrome generated therefrom by the error correcting code circuitry are saved while the memory location of the flawed word is checked to determine the location of the one fixed error using a ancillatory error correction technique. A syndrome is then generated for the word assuming only a single fixed error in the location determined using the ancillatory technique. Thereafter, the generated and saved syndromes are exclusive OR'd together to obtain another syndrome locating the position of the transitory error. With both errors located, the word is corrected by inverting the erroneous data bits.

REFERENCES:
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patent: 4100403 (1978-07-01), Eggenberger et al.
patent: 4139148 (1979-02-01), Scheuneman et al.
patent: 4163147 (1979-07-01), Scheuneman et al.
patent: 4175692 (1979-11-01), Watanabe
patent: 4209846 (1980-06-01), Seppa

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