Electrical computers: arithmetic processing and calculating – Electrical analog calculating computer – Particular function performed
Reexamination Certificate
2000-09-22
2004-03-02
Mai, Tan V. (Department: 2124)
Electrical computers: arithmetic processing and calculating
Electrical analog calculating computer
Particular function performed
C708S671000
Reexamination Certificate
active
06701340
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to analog signal processing, and more particularly to comparators for analog signal processing and programmable integrated circuits that perform analog processing.
2. Description of the Related Art
Typically, analog integrated circuits are designed to receive one or more analog input signals, and process those signals by performing specific functions such as amplification, attenuation, filtering, integration, addition and subtraction. These functions usually dictate the topology of the analog integrated circuit. For example, the topologic arrangement of operational amplifiers and resistors are adjusted to provide either inverting or non-inverting gain. Every topology has specific noise, distortion and offset voltage sensitivities. Changing an analog circuit's function often requires a change in the topology of the analog circuit, which in turn changes the noise, distortion and offset voltage characteristics of the circuit.
An analog integrated circuit with a programmable analog circuit block architecture permits change in a function of the analog circuit without changing the topology of the circuit elements, thereby reducing changes in voltage offset and distortion created by changes in topology. Examples of such analog integrated circuit architectures can be found in U.S. Pat. No. 5,574,678, entitled “Continuous Time Programmable Analog Block Architecture,” by James L. Gorecki, (the “Gorecki patent”) which is incorporated herein by reference in its entirety.
Programmable analog integrated circuits such as those disclosed in the Gorecki patent, typically include analog circuit blocks interconnected by a programmable interconnect structure and provide a self contained integrated circuit architecture which supports basic analog signal processing functions. The analog circuit blocks include basic circuit elements such as operational amplifiers, resistors, and capacitors, which can be programmably connected in a variety of circuit configurations. Users can define the functionality of individual blocks, control their respective characteristics, and interconnect blocks to define an overall architecture. Integrating the elements together in a single integrated circuit has a number of advantages. Critical circuit specifications such as dynamic range and common mode rejection can be more easily controlled, helping to make circuit performance more predictable and reliable. The input and output characteristics of the programmable analog circuit block allow the block to be used within an analog routing pool with other programmable analog circuit blocks to provide more complicated analog circuits without significant degradation in performance. The elimination of external passive components and the addition of programmable interconnect structures for the circuit blocks also reduce the sensitivity of circuit designs to board-level variables and tolerances. Moreover, by removing sensitivity to an analog routing pool and facilitating internal modification of function without changing topologic sensitivity to offset and distortion, an integrated circuit can advantageously be provided with multiple programmable analog circuit blocks and an analog routing pool which can accommodate more complex analog functions.
One advantage of certain programmable analog integrated circuits, such as the ispPAC10™ in-system programmable analog integrated circuit from Lattice Semiconductor Corporation, is that they are fully differential from input to output. This effectively doubles dynamic range as compared to single-ended input/output (I/O), and affords improved performance with regard to specifications such as power-supply rejection (PSR) and total harmonic distortion (THD). However, to fully exploit the usefulness of the fully differential nature of these programmable analog integrated circuits, and in general any fully differential circuit, other fully differential circuits are needed. For example, many analog circuits utilize a comparator, i.e., a circuit that compares two input voltages, and produces a digital output that is either high or low depending upon the relationship of the two input voltages. Conventional comparators use single-ended inputs for the two input voltages and produce a single-ended output.
Accordingly, it is desirable to have a fully differential comparator, where both inputs are differential inputs, for use with fully differential analog circuits, including programmable analog integrated circuits and/or analog circuits comprising discrete components. Moreover, it is desirable to have a digital to analog converter (DAC) circuit with a differential output so as to provide a suitable differential reference voltage for the fully differential comparator. Additionally, it is desirable to have such fully differential analog circuit components that can be integrated into programmable analog integrated circuits as described above, thereby contributing to the numerous benefits of programmable analog integrated circuits.
SUMMARY OF THE INVENTION
It has been discovered that a double differential comparator can be efficiently implemented utilizing a first comparator stage having a folded cascode with floating gate input terminals and clamped single-ended output, and a capacitively coupled input stage for transferring a weighted sum of input signals to the floating gates of the first comparator stage. Additionally, the double differential comparator can be integrated into fully differential programmable analog integrated circuits. Such fully differential programmable analog integrated circuits can also include a differential output digital-to-analog converter to be used with or without the double differential comparator.
Accordingly, one aspect of the present invention provides a programmable analog integrated circuit for receiving a differential analog input signal and providing a processed differential analog output signal. The programmable analog circuit includes a first programmable analog circuit block, a double differential comparator, and an analog routing pool. The first programmable analog circuit block has first analog circuit block positive and negative input terminals and first analog circuit block positive and negative output terminals. The double differential comparator includes first comparator positive and negative input terminals, second comparator positive and negative input terminals, and comparator positive and negative output terminals. The double differential comparator providing a logic high output signal at the comparator output terminals when a first differential voltage applied to the first comparator input terminals is positive with respect to a second differential voltage applied to the second comparator input terminals. The analog routing pool controlling the routing of the differential analog input signal and signals provided by and to the first programmable analog circuit block and the double differential comparator. The analog routing pool is programmable.
In another aspect of the invention, a double differential comparator includes first comparator positive and negative input terminals, second comparator positive and negative input terminals, and comparator positive and negative output terminals. The double differential comparator providing a logic high output signal at the comparator output terminals when a first differential voltage applied to the first comparator input terminals is positive with respect to a second differential voltage applied to the second comparator input terminals.
The foregoing is a summary and this contains, by necessity, simplifications, generalizations and omissions of detail; consequently, those skilled in the art will appreciate that the summary is illustrative only and is not intended to be in any way limiting. As will also be apparent to one of skill in the art, the operations disclosed herein may be implemented in a number of ways, and such changes and modifications may be made without departing from this invention and its broader aspects. Other aspect
Gazeley Bill G.
Gorecki James L.
Yang Yaohua
Lattice Semiconductor Corp.
Mai Tan V.
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