Double-buffered time division switching system

Details Double-buffered time division switching system Double-buffered time division switching system

1988-04-28

1990-02-27

Griffin, Robert L.

Multiplex communications

Wide area network

Packet switching

H04Q 1104

Patent

active

049052268

ABSTRACT:
The invention relates to a time division switching system which may transmit both voice and data signals. The data signals may be transmitted at a much higher speed than the voice signals, such as twice the speed, for example. To do this, the data signals are split into two time slots which are separately transmitted. Since the two time frames are so closely related, they must be transmitted within the same frame as a unit. This is done by a combination of two memory switches and control means for transmitting multi-element information. The two memory switches are used in an alternating sequence.

REFERENCES:
patent: 3967070 (1976-06-01), Srivastava et al.
patent: 4068098 (1978-01-01), Thyselius
patent: 4298977 (1981-11-01), Abbott et al.
patent: 4510597 (1985-04-01), Lewis
patent: 4759010 (1988-07-01), Murata et al.

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