Registers – Systems controlled by data bearing records – Time analysis
Patent
1978-01-20
1979-07-31
Malzahn, David H.
Registers
Systems controlled by data bearing records
Time analysis
G06F 1112
Patent
active
041631471
ABSTRACT:
An improvement to a semiconductor memory subsystem containing single bit error correction/double bit error detection (SBC/DBD) which provides correction of double bit errors through the utilization of a modest amount of additional circuitry. The present invention accomplishes this result through the technique of sequentially complementing each double bit pair within the semiconductor memory subsystem data word determined to contain a multiple error and rechecking the modified data word with the existing SBC/DBD circuitry, one double bit pair at a time, until it is determined by the SBC/DBD circuitry that such double bit pair complementing has corrected the double bit error.
REFERENCES:
patent: 3449718 (1969-06-01), Woo
patent: 3582880 (1971-06-01), Beausoleil et al.
patent: 3755779 (1973-08-01), Price
patent: 3949208 (1976-04-01), Carter
patent: 4030067 (1977-06-01), Howell et al.
patent: 4077028 (1978-02-01), Lui et al.
Scheuneman James H.
Trost John R.
Grace Kenneth T.
Malzahn David H.
Rooney John L.
Sperry Rand Corporation
Truex Marshall M.
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