Dot matrix display panel with a thin film transistor and method

Details Dot matrix display panel with a thin film transistor and method Dot matrix display panel with a thin film transistor and method

1986-12-29

1987-11-03

Miller, Stanley D.

357 237, G02F 113, H01L 2978

Patent

active

047040025

ABSTRACT:
A dot matrix display panel with a thin film transistor and the manufacturing method therefor, the panel being so constructed that a gate insulating layer and a semiconductor layer are provided as one laminated film substantially equal in the size thereto on an insulating substrate having a gate electrode and in a region of the substrate except for the peripheral portion thereof, and a source electrode and a drain electrode come into contact with the semiconductor layer in a region covering the gate electrode and gate insulating layer so as to constitute a thin film transistor array substrate, so that a display medium is sandwiched between the array substrate and the substrate having a transparent electrode.

REFERENCES:
patent: 3824003 (1974-07-01), Koda et al.
patent: 4103297 (1978-07-01), McGreivy et al.
patent: 4344817 (1982-08-01), Chamberlin
patent: 4385292 (1983-05-01), Nonomura et al.
patent: 4386352 (1983-05-01), Nonomura et al.
Lug et al, "A Low-Leakage-Current Thin-Film Transistor for Flat-Panel Displays", 1980 Biennial Display Research Conference, Oct. 1980, pp. 111-113.
Hayama et al, "Amorphous-Silicon Thin-Film Metal-Oxide Semiconductor, Transistors", Appl. Phys. Lett. 36(9), May. 1, 1980, pp. 754 & 755.
Brody et al, "A 6.times.6 Inch 20 Lines-Per-Inch Liquid Crystal Display Panel", IEEE Transactions on Electron Devices, Nov. 11, 1974, vol. ED-20, No. 11, pp. 995-1001.

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