Domino-logic decoder

Details Domino-logic decoder Domino-logic decoder

1991-07-26

1992-09-08

Pascal, Robert J.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307246, 307443, H03K 1900

Patent

active

051461153

ABSTRACT:
A domino-logic decoder which decodes an input in an amount of time substantially independent on the bit size of the input. An address is input to a stack of at least two individually gated transistors in the decoder. A first node at one end of the stack is connected to a charge restoring transistor and a strobing transistor, both coupled to a strobe signal. A second node coupled to the strobing transistor provides the decoder output and operably indicates that a particular portion of the decoder has been selected. During operation, the first node is charged and the second node is isolated from the first node by the strobing transistor. After the inputs have fully charged the input transistors and a path to ground is formed, the first node will be discharged. The second node is discharged across the strobing transistor during the strobe phase, indicating that a particular decoder portion has been chosen. Body effect is also eliminated.

REFERENCES:
patent: 4780626 (1988-10-01), Guerin et al.
patent: 4849658 (1989-07-01), Iwamura et al.
patent: 5041742 (1991-08-01), Carbonaro
patent: 5051620 (1991-09-01), Burgin
patent: 5059825 (1991-10-01), Yoshida

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