Computer graphics processing and selective visual display system – Computer graphic processing system – Integrated circuit
Patent
1997-11-24
2000-08-29
Pan, Daniel H.
Computer graphics processing and selective visual display system
Computer graphic processing system
Integrated circuit
710 29, 710 33, 710 22, G06F 314, G06F 1338, G06F 1328
Patent
active
061115924
ABSTRACT:
When successive DMA transfer is to be performed between a plurality of areas of a memory and a DVD decoder, pairs of start memory addresses and transfer counter values corresponding to the plurality of areas are respectively set in a plurality of DMA register sets. The contents of these DMA register sets are sequentially read in a predetermined order, and a plurality of DMA data transfer operations are repeatedly executed by a DMA controller. Immediately after one DMA data transfer is completed, next DMA data transfer starts in accordance with the contents of the next DMA register set. Successive DMA data transfer can be executed continuously.
REFERENCES:
patent: 5206935 (1993-04-01), Sinks et al.
patent: 5581510 (1996-12-01), Iizuka et al
patent: 5754884 (1998-05-01), Swamstrom
Kabushiki Kaisha Toshiba
Pan Daniel H.
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