Patent
1995-09-29
1998-07-14
Meky, Moustafa M.
G06F 1502
Patent
active
057817995
ABSTRACT:
A method and arrangement for performing direct memory access in a computer system having multi-channel direct memory access (DMA) is provided with a host computer having a main memory and a processor that runs software, a system interface bus coupling the host computer and the main memory, and multiple DMA controllers, on separate chips, coupled to the system interface bus. These multiple DMA controllers provide the system with multiple input/output (I/O) channels. A common buffer pool having a plurality of buffers is accessible to each of the multiple channels for buffering data transferred to or from the host computer. A status queue is also provided, with each entry in the status queue indicating whether a corresponding buffer from the common pool of buffers is a free buffer available for use by one of the DMA channels in a DMA transaction. The status queue is searched for an entry in the status queue which indicates whether its corresponding buffer is a free buffer, when a DMA transaction is to occur over one of the DMA channels. When a free buffer is found, the entry in the status queue and the free buffer are claimed by the DMA channel. The starting address of the free buffer is then determined and data is buffered within the free buffer.
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Benjaram Bhoopal R.
Carpenter Peter R.
Leger Geary
Schaps Gary L.
Wishneusky John Andrew
Cirrus Logic Inc.
Meky Moustafa M.
Nguyen Frank D.
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