DMA control device controlling sequential storage of data

Details DMA control device controlling sequential storage of data DMA control device controlling sequential storage of data

1994-09-06

1996-03-12

Chan, Eddie P.

Boots, shoes, and leggings

395851, 395307, 395311, 39542107, 364DIG1, 3642423, 3642393, 3642511, 3642407, G06F 1320, G06F 1328

Patent

active

054993830

ABSTRACT:
A DMA transfer of 8-bit units and 16-bit units can be performed regardless of the proceeding direction of the address and whether the first address to be accessed is even or odd. In a conventional DMA transfer, the DMA control device required a function for selecting 8-bit configuration or 16-bit configuration of transfer data when the proceeding directions of addresses at the transfer source and transfer destination were different. The present invention reverses a determined result and indicates whether the first address to be transferred is even or odd, when the proceeding direction of the address is "reverse" and the data has a 16-bit configuration.

REFERENCES:
patent: 4109310 (1978-08-01), England et al.
patent: 4447878 (1984-05-01), Kinnie et al.
patent: 4631671 (1986-12-01), Kawashita et al.
patent: 4878166 (1989-10-01), Johnson et al.
patent: 5214767 (1993-05-01), Wanner et al.
patent: 5243701 (1993-09-01), Maramatsu et al.

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