DMA asynchronous mode clock stretch

Details DMA asynchronous mode clock stretch DMA asynchronous mode clock stretch

1983-04-14

1986-09-09

Thomas, James D.

Boots, shoes, and leggings

G06F 1300, G06F 100

Patent

active

046112790

ABSTRACT:
An adaptively stretched clock input feature is provided on a natively synchronous DMAC device to make it support data transfers in an asynchronous bus environment. This feature effects adjustment of the DMAC transfer strobe access window as a function of data transfer (DTACK) timing. A late DTACK signal causes stretch of the clock controlled TXSTB transfer strobe to a length which will accommodate worst case memory access conditions of the asynchronous bus structure.

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MC68000 DMA Using the MC6844 DMA Controller.
The Inter-Relationship between Access Time and Clock Rate in an MC68000 System.

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