Patent
1992-07-10
1993-08-31
Richardson, Robert L.
395425, G06F 1318
Patent
active
052416615
ABSTRACT:
In a computer system having both peripherals having their own DMA channel arbiter and peripherals having no arbiter, a separate arbitration unit, controlled directly by the CPU, is provided to arbitrate on behalf of peripherals having no arbiter. The CPU can thus freely assign different arbitration levels to such peripherals, and can instruct the arbitration unit to simultaneously arbitrate on different arbitration levels or for two or more DMA channels.
REFERENCES:
patent: 3638198 (1972-01-01), Balogh, Jr.
patent: 3766526 (1973-10-01), Buchanan
patent: 3925766 (1975-12-01), Bardotti et al.
patent: 4090238 (1978-05-01), Russo
patent: 4156277 (1979-05-01), Seitz et al.
patent: 4245300 (1981-01-01), Kaufman et al.
patent: 4257095 (1981-03-01), Nadir
patent: 4262357 (1981-04-01), Shima
patent: 4296466 (1981-10-01), Guyer et al.
patent: 4320467 (1982-03-01), Glass
patent: 4371932 (1983-02-01), Dinwiddie et al.
patent: 4400771 (1983-08-01), Suzuki et al.
patent: 4419728 (1983-12-01), Larson
patent: 4511959 (1985-04-01), Nicolas et al.
patent: 4538224 (1985-08-01), Peterson
patent: 4556952 (1985-12-01), Brewer et al.
patent: 4584703 (1986-04-01), Hallberg
patent: 4604699 (1986-08-01), Borcherdt et al.
patent: 4611297 (1986-09-01), Dudley et al.
patent: 4621342 (1986-11-01), Capizzi et al.
patent: 4755938 (1988-07-01), Takahashi et al.
patent: 4789926 (1988-12-01), Clarke
K. Zibert et al, Designing an Advanced DMA Controller for 16-Bit Microcomputers, Siemens Forsch, vol. 13, No. 5, 1984.
D. J. Schuelka, Master/Slave Cascade Channel for Microprocessor DMA, IBM Technical Disclosure Bulletin, vol. 22, No. 5, Oct. 1979.
C. J. Duggan, Low Performance Cycle Steel Priority, IBM Technical Disclosure Bulletin, vol. 18, No. 5, Oct. 1975.
G. T. Davis, Multiplexing of Interrupt and DMA Request Lines, IBM Technical Disclosure Bulletin, vol. 27, No. 5, Oct. 1984.
American National Standard, IEEE Standard 696 Interface Device, Jun. 13, 1983, New York.
Intel., 8237A/8237A-4/8237A-5 High Performance Programmable DMA Controller.
Jerry M. Rosenberg, Dictionary of Computers, Information Processing and Telecommunications, Second Edition, John Wiley and Sons, 1987, pp. 24 and 68.
Concilio Ian A.
Hawthorne Jeffrey A.
Heath Chester A.
Lenta Jorge F.
Ngyuen Long D.
Brown, Jr. Winfield J.
International Business Machines - Corporation
Lieber Robert
Richardson Robert L.
Terrile Stephen A.
LandOfFree
DMA access arbitration device in which CPU can arbitrate on beha does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with DMA access arbitration device in which CPU can arbitrate on beha, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and DMA access arbitration device in which CPU can arbitrate on beha will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2304854