DLL circuit of semiconductor memory apparatus and method of...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S149000, C327S156000

Reexamination Certificate

active

07612591

ABSTRACT:
A DLL circuit of a semiconductor memory apparatus includes a frequency sensing unit that generates and outputs a high frequency signal and a low frequency signal on the basis of a CAS latency signal. A clock dividing unit divides the frequency of an internal clock by a predetermined value and generates a divided clock in response with whether the high frequency signal is enabled or the low frequency signal is enabled. A phase sensing unit that switches a reference clock and a comparison clock, compares the phases thereof in accordance with whether the high frequency signal is enabled or the low frequency signal is enabled, selectively switches first and second phase control signals generated on the basis of the comparison result, and outputs the switched signals.

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