DLL circuit and method of controlling the same

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S156000, C327S175000

Reexamination Certificate

active

07598783

ABSTRACT:
A DLL circuit includes a duty ratio detection unit that detects a duty ratio of a rising clock and a duty ratio of a falling clock, thereby outputting a duty ratio detection signal. A correction control unit generates a correction control signal in response to the duty ratio detection signal. A duty ratio correction unit corrects a duty ratio of an internal. clock in response to the correction control signal, thereby outputting a reference clock.

REFERENCES:
patent: 5614855 (1997-03-01), Lee et al.
patent: 6853225 (2005-02-01), Lee
patent: 6859081 (2005-02-01), Hong et al.
patent: 6963235 (2005-11-01), Lee
patent: 2004/0066873 (2004-04-01), Cho et al.
patent: 2004/0155686 (2004-08-01), Kim et al.
patent: 2006/0001462 (2006-01-01), Kim et al.
patent: 2006/0197565 (2006-09-01), Kang
patent: 2004-129255 (2004-04-01), None
patent: 1020000055361 (2000-09-01), None
patent: 1020010110968 (2001-12-01), None
patent: 1020050055925 (2005-06-01), None
“A Register-Controlled Digital DLL with Digital Duty Cycle Detector for Multi Gbps GDDR3 SDRAM”, Memory R&D Division, Hynix Semiconductor Inc. Ichon, Kyoungki, Korea, hyunwoo.lee@hynix.com.

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