DLL circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Details

C327S149000

Reexamination Certificate

active

07626432

ABSTRACT:
A DLL circuit has an input circuit configured to generate a synchronization reference signal on the basis of an input signal, a first delay unit configured to delay the synchronization reference signal, a timing offset circuit configured to adjust a synchronization position of the synchronization reference signal delayed by the first delay unit to generate a signal to be synchronized, a phase comparison circuit configured to compare phase of the synchronization reference signal with that of the signal to be synchronized, a first control circuit configured to select an output signal of the first delay unit on the basis of a comparison result of the phase comparison circuit, a second delay unit configured to delay the synchronization reference signal or the signal to be synchronized and a second control circuit configured to select an output signal of the second delay unit in the case where the comparison result of the phase comparison circuit is within a predetermined range. The phase comparison circuit compares the phase of the signal, which is either the synchronization reference signal or the signal to be synchronized, delayed by the second delay unit with the phase of the other signal.

REFERENCES:
patent: 6229363 (2001-05-01), Eto et al.
patent: 6255870 (2001-07-01), Na
patent: 6351169 (2002-02-01), Kuge
patent: 6573776 (2003-06-01), Miyamoto
patent: 7327175 (2008-02-01), Lee
patent: 7436230 (2008-10-01), Kim
patent: 2003/0076143 (2003-04-01), Nishimura et al.
patent: 2005/0242854 (2005-11-01), Kang et al.
patent: 2004-260663 (2004-09-01), None

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