Division and/or square root calculating circuit

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

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708605, G06F 752, G06F 7552

Patent

active

061086827

ABSTRACT:
An iterative division and/or iterative square root circuit 20 uses quotient digits q.sub.j+1 within the calculation that are dependent upon the input divisor D or radicand A and current partial remainder or partial radicand P.sub.j for the cycle reached. As the input divisor D or radicand A is fixed throughout the calculation, the critical path through the iterative circuit may be speeded up by preselecting and storing a subset QC of quotient digit values using a primary quotient digit selecting circuit 18, 22 operating in dependence upon the divisor D or radicand A and independently of the partial remainder or partial radicand P.sub.j. Within the iterative circuit 20, the quotient digits q.sub.j+1 to be used for each cycle can then be selected from this subset QC by a secondary quotient digit selecting circuit 24 in dependence upon the partial remainder or partial radicand P.sub.j and independent of the divisor D or radicand A.

REFERENCES:
patent: 3591787 (1971-07-01), Freiman et al.
patent: 3736413 (1973-05-01), Ferguson
patent: 5696712 (1997-12-01), Prabhu et al.
patent: 5818745 (1998-10-01), Sheaffer
patent: 5870323 (1999-02-01), Prabhu et al.
L.B. Bushard, IEEE Transactions On Computers, vol. C-32, No. 6, Jun. 1983 "A Minimum Table Size Result for Higher Radix Nonrestoring Division" pp. 521-526.

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