Divider method and apparatus with means for avoiding divide by z

Telecommunications – Receiver or analog modulated signal frequency converter – Frequency or phase modulation

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Details

455314, 455303, 364850, 307529, H04B 126

Patent

active

049493965

ABSTRACT:
A divider circuit arrangement in which in order to avoid dividing by zero the divisor (V.sub.d) is modified by the addition of an extra signal (X.sub.a) to form a modified divisor V'.sub.d =V.sub.d +X.sub.a and the dividend (V.sub.i) is modified by the addition of the product of the quotient (V.sub.o) and the extra signal (X.sub.a) to form a modified dividend V'.sub.i =V.sub.i +V.sub.o X.sub.a. A particular but not exclusive application of this divider circuit arrangement is in normalizing an ouptut signal from a dual branch receiver (not shown).

REFERENCES:
patent: 4462114 (1984-07-01), Parker
patent: 4677690 (1987-06-01), Reed

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