Diversity receiver

Pulse or digital communications – Receivers – Interference or noise reduction

Patent

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Details

455132, H04B 710, H04L 102

Patent

active

059533838

ABSTRACT:
According to the present invention, it is possible to improve a bit error rate performance of a conventional diversity receiver.
In a diversity receiver of the present invention, first, second to Lth multiple differential detection signals and received signal strength are generated by multiple differential detection/signal strength detecting circuits, and are inputted into a combined branch metric generating circuit in a sequence estimator, thereby generating a combined branch metric. An ACS circuit is operated for an ACS operation on the basis of Viterbi algorithm by using the combined branch metric. A path memory sequentially takes as input path selecting signals outputted from the ACS circuit, and update the memory contents. A maximum likelihood state detecting circuit detects the most probable state by using a path metric outputted from the ACS circuit. A decision circuit determines and outputs demodulated data from a value corresponding to a surviving path leading to the most probable state detected by the maximum likelihood state detecting circuit among the oldest memory contents in the path memory.

REFERENCES:
patent: 5621769 (1997-04-01), Wan et al.
patent: 5621770 (1997-04-01), Zastera
patent: 5654980 (1997-08-01), Latva-aho et al.
patent: 5668839 (1997-09-01), Bernasconi et al.
patent: 5680419 (1997-10-01), Bottomley
patent: 5710995 (1998-01-01), Akaiwa et al.

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