Dithering logic for the display of video information

Interactive video distribution systems – Operator interface – To facilitate tuning or selection of video signal

Reexamination Certificate

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Details

C348S630000, C348S453000, C382S162000

Reexamination Certificate

active

06219838

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the processing of video information generated for display on a non-interlaced computer display prior to presentation on an interlaced television display.
BACKGROUND
With the convergence of digital information in the home, a need has arisen for the integration of home computers with other information appliances. In co-pending application Ser. Nos. 08/792,003 and 08/792,361, both filed Jan. 31, 1997, and assigned to the Assignee of the present invention, an exemplary digital wireless home network was described. The network has at its heart an information furnace that allows users to enjoy a variety of multimedia content distributed from a host computer to various appliances throughout the home. Within this vision of the information furnace, the home computer is established as the central aggregation point for digital content in the home, which content is then wirelessly distributed to locations and appliances throughout the home that are optimal for its consumption. These alternative consumption locations enable new dynamics in the use of multimedia content, including mobility, comfort, social interaction, and linkages with other household appliances, such as audio/visual systems. The information furnace further allows users to consume the content in their preferred locations (and even be mobile in the home if desired), enables multiple users to simultaneously interact with the content, and reduces the cost of the appliances used to access the content (computing resources, such as the CPU, memory and modem are leveraged from a central source).
The distribution of video information as part of the home network environment presents certain challenges for the network designer. For example, digital video information ordinarily destined for display on a computer monitor or other display unit is generally provided in an R-G-B (red-green-blue), noninterlaced format for that video display unit. If consumer appliances such as televisions are to make use of the video information, the format of this information must be altered to an acceptable format (e.g., NTSC compatible, interlaced video information). Thus, what is needed is a scheme for preprocessing the video information prior to presentation on the television display screen.
SUMMARY OF THE INVENTION
In one embodiment, dithering logic for use in the display of video information includes a number of programmable linear feedback shift registers (LFSRs), each configured to receive one of a number of color components (e.g., red-green-blue) of a video information signal as an input and to provide one of a number of dithered color components of the video information signal as an output. The dithered color components each include a greater number of bits than the color components. The LFSRs may be configured so that each LFSR includes a mask register configured to select a characteristic polynomial.
In a further embodiment, a circuit for use in the processing of video information may include a number of programmable pseudorandom number generators, each associated with a color component (e.g., red-green-blue) of a video signal, and a number of logic circuits, each associated with one of the pseudorandom number generators and configured to logically combine the associated color component of the video signal with output signals of the associated pseudorandom number generator. Preferably, each of the pseudorandom number generators is programmable via a mask register configured to select a characteristic polynomial. Further, each of the logic circuits may include a number of logical AND gates.
In yet another embodiment, a computer network is organized to include a graphics processor configured to transmit video information signals, and a set-top controller communicatively coupled to the graphics processor so as to receive the video information signal. The set-top controller includes programmable dithering logic configured to introduce random noise into the video information signal in accordance with one or more characteristic polynomials. Preferably, the characteristic polynomials are primitive polynomials.
The dithering logic may include a number of programmable linear feedback shift registers (LFSRs), each configured to accept one of the characteristic polynomials and to produce one or more low order bits of at least one of a number of color components (e.g., red-green-blue) present in the video information signal in accordance therewith. Further, each of the LFSRs may be coupled to an associated mask register configured to store at least one of the characteristic polynomials.
The dithering logic may further include a number of logical combining blocks; each associated with one of the LFSRs. Each logical combining block may be configured to accept one or more outputs of its associated LFSR and one or more bits of an associated color component. Thus, each block may produce one or more low order bits of the associated color component from its inputs. Preferably, the logical combining blocks are each made up of one or more logical AND gates. In one particular embodiment, the logical combining block associated with the green one color component includes fewer logical AND gates than the logical combining blocks associated with either the red or blue color components.


REFERENCES:
patent: 5774577 (1998-06-01), Ueda et al.
patent: 5905504 (1999-05-01), Barkans et al.
patent: 5991438 (1999-11-01), Shaked et al.
patent: 6008794 (1999-12-01), Ishii
patent: 6057831 (2000-05-01), Harms et al.

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