Dither circuit responsive to zero input signal level

Details Dither circuit responsive to zero input signal level Dither circuit responsive to zero input signal level

1989-11-22

1990-06-26

Shoop, Jr., William M.

Coded data generation or conversion

Analog to or from digital conversion

Increasing converter resolution

341126, H03M 120

Patent

active

049375768

ABSTRACT:
A dither circuit including an adder for receiving an input signal and a dither signal which is generated by a dither signal generator, a level detection circuit for detecting the signal level of the input signal, and a dither control circuit for stopping the feeding of the dither signal to the adder when the level detection circuit detects that the signal level of the input signal is zero.

REFERENCES:
patent: 4183016 (1980-01-01), Sawagata et al.
patent: 4751496 (1988-06-01), Araki et al.
patent: 4845498 (1989-07-01), Kubo et al.
patent: 4857927 (1989-08-01), Takabayashi

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