Distributing timers across processors

Electrical computers and digital processing systems: multicomput – Network-to-computer interfacing

Reexamination Certificate

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Details

C710S005000, C703S025000, C709S232000, C709S201000, C709S230000, C709S223000

Reexamination Certificate

active

07461173

ABSTRACT:
A method of maintaining network protocol timers in data structures associated with different respective processors in a multi-processor system. The timers accessed by a respective one of the processors include timers of connections mapped to the processor.

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