Electric power conversion systems – Phase conversion without intermediate conversion to d.c. – By dynamoelectric machine converter
Reexamination Certificate
2003-05-19
2004-11-16
Sherry, Michael (Department: 2838)
Electric power conversion systems
Phase conversion without intermediate conversion to d.c.
By dynamoelectric machine converter
C363S065000, C323S282000
Reexamination Certificate
active
06819577
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
N/A
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
N/A
BACKGROUND OF THE INVENTION
The present application relates generally to multi-phase power systems, and more specifically to improved circuits and methods of synchronizing controllers employed in such systems.
In recent years, there has been a sharp increase in the demand for electrical and electronic products that are smaller, use less power, require less Printed Circuit Board (PCB) space, and are less costly. For this reason, small low-power multi-phase power systems have been increasingly employed in the power supplies of such electronic products and devices. For example, multi-phase power systems may be used to implement multi-phase power converters such as high frequency DC-to-DC converters.
Some conventional multi-phase power systems typically include a plurality of multi-phase controllers and associated synchronization circuitry. For example, each multi-phase controller may comprise an LTC1629 “poly-phase” controller, which is sold by Linear Technology, Inc., Milpitas, Calif., U.S.A. In such a multi-phase power system, a Phase-Locked Loop (PLL) circuit is typically used to synchronize the clocks and phases of the controllers, and to assure that appropriate phase shifts are achieved among the several controllers. In this way, potentially harmful parasitic interactions between the controllers are reduced, and the efficiency of the multi-phase power system is increased.
One drawback of the above-described conventional multi-phase power system is that the PLL-based approach to synchronizing the controllers generally produces jitter, which can cause a significant amount of noise to appear at the system output. Further, the PLL synchronization circuit normally requires a significant amount of time to lock-on the desired clock frequency. Moreover, the total pin count of each controller package is relatively high, and the PLL circuit for synchronizing the controllers typically comprises a number of discrete components. As a result, the amount of PCB space needed to implement the multi-phase power system within an electrical or electronic product is increased, which can lead to significant increases in the electronic product's overall size and cost.
It would therefore be desirable to have a multi-phase power system implementation that overcomes the drawbacks of the above-described conventional systems and methods.
BRIEF SUMMARY OF THE INVENTION
In accordance with the present invention, a highly efficient multi-phase power system is provided that has both reduced size and reduced cost. The presently disclosed multi-phase power system achieves such size and cost reductions by employing a simplified synchronization technique that includes directly synchronizing a plurality of controllers within the system to a single master clock.
In one embodiment, the multi-phase power system includes a plurality of programmable multi-phase controllers. A first controller is programmed to function as a “master” controller, and the remaining controller(s) are programmed to function as “slave” controllers. Each of the controllers includes a synchronous counter and control logic circuitry. The control logic is operatively coupled to the synchronous counter to generate at least one synchronization output signal based on the outputs of the counter and the programming state (i.e., master or slave) of the controller.
In the presently disclosed embodiment, the master controller is configured to generate a master clock signal having a synchronizing state encoded thereon. The master controller encodes the synchronizing state on the master clock signal by conceptually skipping one or more predetermined cycles of the clock. By encoding the synchronizing state on the master clock signal, the master controller effectively inserts one or more synchronizing pulses into the clock signal. The master controller provides the master clock signal to each of the slave controllers. Each slave controller includes synchronization circuitry configured to receive the master clock signal, and to reset the synchronous counter included therein based on the synchronizing state of the master clock, thereby assuring that appropriate phase relationships are maintained between the respective controller outputs.
By directly synchronizing the clocks and phases of a plurality of controllers to a single master clock, a smaller and less costly multi-phase power system can be achieved without reducing the efficiency of the power system.
Other features, functions, and aspects of the invention will be evident from the Detailed Description of the Invention that follows.
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Multi-Topology High-Frequency PWM Controller, Texas Instruments, TPS43000, SLUS489, Oct. 2001, pp. 1-26.
Designing With the TL5001 PWM Controller, Application Report, Texas Instruments, SLVA034A, 1995, pp. 1-40.
Muratov Vladimir Alexander
Wiktor Stefan Wlodzimierz
Brady W. James
Laxton Gary L.
Sherry Michael
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
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