Distributed switch memory architecture

Details Distributed switch memory architecture Distributed switch memory architecture

2006-01-31

2006-01-31

Ton, Dang (Department: 2666)

Multiplex communications

Pathfinding or routing

Through a circuit switch

C370S428000

Reexamination Certificate

active

06993020

ABSTRACT:
A distributed memory switch system for transmitting packets from source ports to destination ports, comprising: a plurality of ports including a source port and a destination port wherein a packet is transmitted from the source port to the destination port; a memory pool; and an interconnection stage coupled between the plurality of ports and the memory pool such that the interconnection stage permits a packet to be transmitted from the source port to the destination port via the memory pool.

REFERENCES:
patent: 6233242 (2001-05-01), Mayer et al.
patent: 6430184 (2002-08-01), Robins et al.
patent: 6697362 (2004-02-01), Akella et al.

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