Distributed shared-memory multiprocessor system with reduced tra

Details Distributed shared-memory multiprocessor system with reduced tra Distributed shared-memory multiprocessor system with reduced tra

1993-08-11

1996-05-28

Chan, Eddie P.

Boots, shoes, and leggings

395448, 395475, 395470, 395471, 364DIG1, 3642292, 3642384, 3642431, 36424341, G06F 1208

Patent

active

055220584

ABSTRACT:
A distributed shared-memory multiprocessor system capable of reducing a traffic on the shared bus, without imposing any constraint concerning the types of variables to be accessed in the parallel programs, such that a high system extensibility can be realized. The system is formed by a plurality of processor units coupled through a shared bus, where each processor unit comprises: a CPU; a main memory connected with the CPU through an internal bus, for storing a distributed part of data entries of a shared-memory of the system; a cache memory associated with the CPU and connected with the main memory through the internal bus, for caching selected data entries of the shared-memory; and a sharing management unit connected with the main memory and the cache memory through the internal bus, For interfacing the internal bus and the shared bus according to a sharing state for each data entry of the main memory and a cache state of each data entry of the cache memory.

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