Distributed programmable priority arbitration

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364DIG1, 3642426, 36424292, 3642428, 3642592, G06F 13374

Patent

active

053074661

ABSTRACT:
A distributed arbitration scheme for a communications bus wherein the bus interface modules decide among themselves who should next use the bus. The protocol is a common multiprocessor backplane bus interface for supporting multiprocessing, shared memory, and memory mapped input/output operations. The protocol allows programmable priority which can be changed during system operation. The architecture handles interrupts over the bus and therefore eliminates separate interrupt lines. The scheme can implemented in CMOS technology and is compatible with other integrate circuit device technology.

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