Distributed execution of mode mismatched commands in multiproces

Details Distributed execution of mode mismatched commands in multiproces Distributed execution of mode mismatched commands in multiproces

1996-03-04

1998-01-06

Barry, Lance Leonard

Boots, shoes, and leggings

395675, 395800, 3642303, 3642304, 3642329, G06F 900

Patent

active

057065144

ABSTRACT:
A technique for handling processor mode mismatched instructions or commands encountered by a CPU within a multiprocessor computer system. During thread execution, if a multimode processor encounters a command or instruction that it cannot execute without shifting modes or mode emulation, it will look for an alternate processor present in the computer system to instead handle the mode mismatched command. If a suitable alternate is found, necessary input parameters including mode reconfiguration information are downloaded to a common memory area accessible to all processors in the system, and the alternate processor is loaded with the starting address of the code that will handle the mismatched command/instruction. The originating processor may suspend thread execution until the alternate processor completes execution. When complete, the alternate processor downloads the results to common memory, and signals its status to the originating processor. Thereafter, the originating processor uploads the results and resumes thread execution if previously suspended.

REFERENCES:
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patent: 5283897 (1994-02-01), Georgiadis et al.
patent: 5301324 (1994-04-01), Dewey et al.
patent: 5485624 (1996-01-01), Steinmetz et al.
patent: 5590284 (1996-12-01), Crosetto
patent: 5590328 (1996-12-01), Seno et al.

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