Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Power system
Reexamination Certificate
2006-02-28
2006-02-28
Rodriguez, Paul L. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Power system
C716S030000, C716S030000, C709S241000
Reexamination Certificate
active
07006962
ABSTRACT:
A method and system for predicting delay of a multi-million gate sub-micron ASIC design is disclosed. The method and system include automatically partitioning a netlist into at least two logic cones, and running respective instances of a delay prediction application on the logic cones on at least two computers in parallel.
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Gowda Manjunatha
Goyal Saket
Krishnamurthy Prabhakaran
Raman Santhanakrishnan
Subbarao Prasad
LSI Logic Corporation
Rodriguez Paul L.
Sawyer Law Group
Thangavelu Kandasamy
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