Multiplex communications – Wide area network – Packet switching
Patent
1980-03-31
1983-04-12
Orsino, Jr., Joseph A.
Multiplex communications
Wide area network
Packet switching
370 58, H04M 300
Patent
active
043799507
ABSTRACT:
A computer-controlled distributed communication system in which there is a system controller and a plurality of group controllers all interchanging information over a system bus. Each group controller has its individual group bus for the exchange of information between stations of the group and the group controller. Each group controller shares a portion of its random access memory (RAM) with the system controller. When information is directed at approximately the same time to the RAM from a group central processing unit (CPU) bus and from the system CPU bus, the first to access the RAM is enabled to feed its information. Neither bus has any preference. The fed information is stored temporarily in a temporary storage of mailbox RAM in the group. Within the mailbox RAM, separate sections are provided for the storage of information for each direction of information transfer. The mailbox RAM is periodically interrogated during regular scans by the respective controllers to determine if information is stored awaiting transfer. An indication of stored information in a section triggers the transmission of information from the mailbox RAM when the destination bus is available. In this way, each processor can continue functioning without the imposition of a hold condition when access to the bus is not possible at that time.
REFERENCES:
patent: 4096572 (1978-06-01), Namimoto
patent: 4144407 (1979-03-01), Zaffignani et al.
Chaban Marvin M.
International Telephone and Telegraph Corporation
Orsino Jr. Joseph A.
Raden James B.
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