Distributed clock synchronization in a digital data switching sy

Details Distributed clock synchronization in a digital data switching sy Distributed clock synchronization in a digital data switching sy

1985-01-14

1987-07-14

Griffin, Robert L.

Pulse or digital communications

Spread spectrum

Direct sequence

328 72, 328155, 370103, 331 1A, H04L 700

Patent

active

046807799

ABSTRACT:
A clock synchronization system in a digital data switching system, such as a digital PBX. The system has a local clock generating timing signals at a frequency greater than a nominal frequency, a circuit for lowering the local clock frequency and a comparator coupled to a second clock operating substantially at the nominal frequency for activating the lowering circuit so that the local clock is synchronized with the second clock. The system is distributed by placing the local clock and the lowering frequency on the control module of the switching system and placing the comparator to one or more of the line card modules which is receiving the second clock signals. Communication between the comparator and lowering circuit may be over a single line.

REFERENCES:
patent: 3629506 (1971-12-01), Brun
patent: 3988696 (1976-10-01), Sharpe
patent: 4231114 (1980-10-01), Dolikian

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