Distributed array activation arrangement

Details Distributed array activation arrangement Distributed array activation arrangement

1998-06-23

1999-12-07

Nelms, David

Static information storage and retrieval

Addressing

Plural blocks or banks

365206, G11C 800

Patent

active

059994770

ABSTRACT:
An activation arrangement for reducing worst case localized supply noise for shared circuitry includes a first group of circuit blocks, a second group of circuit blocks, a shared circuit, and a selection circuit. The first and second circuit blocks are arranged symmetrically about the shared circuit. The selection circuit is configured to selectively activate each circuit block in the first group and, concurrently, a circuit block in the second group corresponding to the circuit block of the first group. The selection circuit is configured so that when the circuit block of the first group that is closest to the shared circuit is to be activated, the corresponding circuit block in the second group is the circuit block that is farthest from the shared circuit. In a similar manner, the selection circuit is configured so that when the circuit block in the first group that is second closest to the shared circuit is to be activated, the corresponding circuit block in the second group is the circuit block that is second farthest from the shared circuit, and so on.

REFERENCES:
patent: 4596001 (1986-06-01), Baba
patent: 4809229 (1989-02-01), Nukiyama
patent: 4811297 (1989-03-01), Ogawa
patent: 5058058 (1991-10-01), Yasuda et al.
patent: 5276649 (1994-01-01), Hoshita et al.
patent: 5377151 (1994-12-01), Komuro
patent: 5734617 (1998-03-01), Zheng

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