Distributed arbitration for multiple processors

Details Distributed arbitration for multiple processors Distributed arbitration for multiple processors

1984-04-24

1986-12-30

Eng, David Y.

Boots, shoes, and leggings

34082551, G06F 946

Patent

active

046333940

ABSTRACT:
A method of arbitrating for N processors requesting access to a shared resource utilizing 2 log.sub.2 N shared variables, such as electrical lines. Each processor can assert a line which is asserted if any processor is asserting it. A requesting processor asserts one of two lines for each bit of a unique processor address, the choice of line depending on the value of the bit. The processor then examines the non-asserted line to determine if it is asserted by another processor. If the other line is asserted, the requesting processor either releases its own asserted line or waits depending on the value of the address bit. Thus, priority is determined by the address values. Once a processor has successfully asserted lines for every bit of its address it is granted access.
Arbitration with fairness can be obtained by dividing processors into two fairness groups and assigning a turn to one of the groups. A processor is allowed into arbitration if the turn belongs to its fairness group. Upon completing access, the processor is assigned to the other fairness group. The turn is changed when no processor of that fairness group is requesting access.

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