Amplifiers – With semiconductor amplifying device – Including distributed parameter-type coupling
Reexamination Certificate
2001-04-05
2002-10-29
Shingleton, Michael B (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including distributed parameter-type coupling
C330S295000, C330S311000
Reexamination Certificate
active
06472941
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a distributed amplifier, more particularly, to a distributed amplifier for use in amplifying a wideband signal of tens of kHz to 40 GHz or more.
2. Description of the Related Art
Along with a rapidly spread use of internet in recent years, demand has been increasing for a communication system which can transmit/receive a great volume of data at high speed, and as one constituent thereof, there have been requirements for amplifiers with a flat gain in the range of tens of kHz to 40 GHz or more.
A distributed amplifier has a LC transmission circuit (quasi-transmission line) of a high cut-off frequency due to coupling between the input/output capacitances of amplifying transistors and the distributed inductances of input/output transmission circuits. Therefore, the distributed amplifier is used for amplifying a wideband digital signal at stages before electronic to optical signal conversion and after optical to electronic signal conversion in communication system.
FIG. 7
shows a typical distributed amplifier in the prior art.
An output transmission circuit
20
has inductive elements
21
to
28
connected in series, and one end thereof is connected through a terminating circuit of a series connection of a terminating resistor R
2
and a capacitor C
2
to ground. The resistor R
2
has an impedance of about 50 ohms which is nearly equal to a characteristic impedance of the output quasi-transmission line, and the capacitor C
2
is employed to ground at high frequencies and block a dc current. By the capacitor C
2
, it is possible to prevent power from being consumed at the resistor R
2
due to a drain bias voltage VDD
1
.
By applying a DC gate bias voltage VGG
1
and a DC drain bias VDD
1
to the gate and the drain, respectively, of each of FETs
31
A to
34
A, a DC bias current flows between the drain and the source of each of the FETs
31
A to
34
A.
When a voltage signal Vin is provided to the input terminal IN of the transmission circuit
10
, the signal Vin propagates along the transmission circuit
10
, and portions thereof shunt to the respective gates of FETs
31
A to
34
A. The FET
31
A for example has a drain current composed of a signal component (i
1
+i
2
)) and a bias current component, where i
1
and i
2
are currents flowing out on the terminating resistor R
2
side and the output terminal OUT side, respectively. Signal currents flowing to the output terminal OUT from the FETs
31
A to
34
A are simply accumulated at the output terminal OUT since signal path lengths from the input terminal IN through the respective FETs
31
A to
34
A to the output terminal OUT are the same as each other and in turn, the signal currents are all in phase at the output terminal OUT.
Since the impedance of the capacitor C
2
can be neglected in regard to high frequency components of the signal, the impedances on the terminating resistor R
2
side and the output terminal OUT side measured at the drain of FET
31
A are approximately equal to a characteristic impedance 50 ohms, leading to the relation of i
1
=i
2
. This also applies to the cases of FETs
32
A to
34
A in a similar manner.
However, since the impedance of the capacitor C
2
cannot be neglected in regard to low frequency components of the signal, the impedance on the terminating resistor R
2
side increases for lower frequency components and the signal current i
2
comes to be larger than the signal current i
1
. This also applies to the cases of FETs
32
A to
34
A in a similar manner. For this reason, as shown in
FIG. 4
, the gain of the distributed amplifier in the low frequency band is higher than that in the high frequency band where the gain stays flat, and tends to increase as a frequency is lower in the low frequency band.
If the capacitance C
2
is omitted in order to prevent the increase in the gain in the low frequency band, a power consumed in the distributed amplifier is increased by the drain bias voltage VDD applied across the terminating resistor R
2
.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a distributed amplifier capable of improving the flatness of the gain at low frequencies and reducing power consumption with a simple configuration.
In one aspect of the present invention, there is provided a distributed amplifier with a terminating circuit connected to an end of an output transmission circuit which is, for example, an output transmission line, the terminating circuit comprising: a first DC bias voltage input terminal to apply a DC bias voltage through the output transmission circuit to outputs of a plurality of amplifying circuits; a terminating resistance connected between the first DC bias voltage input terminal and the end of the output transmission circuit; and a DC blocking circuit connected to the output transmission circuit to block a current across the terminating resistance.
With this configuration, since no DC blocking capacitor is connected in series to the terminating resistance, a higher gain at low frequencies is prevented to improve gain flatness. Further, since a current across the terminating resistance is prevented, a power consumption is reduced.
In one embodiment, the DC blocking circuit comprises: a second DC bias voltage input terminal to apply the DC bias voltage; and an inductor connected between the second DC bias voltage input terminal and the one end.
In another embodiment, the DC blocking circuit comprises an inductor connected in parallel to the terminating resistor.
Other aspects, objects, and the advantages of the present invention will become apparent from the following detailed description taken in connection with the accompanying drawings.
REFERENCES:
patent: 5920230 (1999-07-01), Beall
patent: 6342815 (2002-01-01), Kobayashi
Armstrong Westerman & Hattori, LLP.
Fujitsu Limited
Shingleton Michael B
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