Distortion corrector for two data flows

Details Distortion corrector for two data flows Distortion corrector for two data flows

1997-11-25

2000-02-22

Le, Amanda T.

Pulse or digital communications

Equalizers

Automatic

375266, 375350, 708303, 708322, H04B 110

Patent

active

060288957

DESCRIPTION:

BRIEF SUMMARY
DESCRIPTION

The invention relates to an arrangement for equalizing two data streams. Such an arrangement is disclosed in EP-0 179 393 B1.
Linear distortions, in particular echoes occur up to the receiver on the transmission path during the transmission of digital modulated telecommunication signals. Since the echoes can change with time, adaptive equalization must be performed. Furthermore, distortions within the receiver can occur in the demodulation path and must be taken into account during equalization. EP-0 179 393 B1 discloses for the purpose of equalization the use of a surface wave filter whose coefficients can be set adaptively. The surface wave filter is arranged upstream of the demodulation path. In order to calculate the coefficients it is normal for this purpose to compare the distorted carrier-frequency signal upstream of the surface wave filter with the equalized, carrier-frequency signal downstream of the surface wave filter. It is thus not possible to detect the distortions in the demodulation path.
The object of the invention is to equalize all signal interference occurring in the transmission path and in the receiver in the case of an arrangement of the type mentioned at the beginning.
This object is achieved according to the principles of the present invention.
The invention is explained in more detail with the aid of the drawings, in which
FIGS. 1 to 4 show block diagrams of exemplary embodiments of the equalizing arrangement according to the invention, and
FIG. 5 shows a block diagram of a filter suitable for the arrangements according to FIGS. 1 to 4.
FIG. 1 shows an arrangement consisting of a non-recursive FIR filter 20 having the two component transfer functions H.sub.I (z) and H.sub.Q (z), a quadrature amplitude demodulator 30, an adder circuit 120, an adder circuit 130, a circuit 40 for converting the data stream I by means of the inverse filter transfer function 1/H.sub.I (z), a circuit 60 for converting the data stream I likewise by means of the inverse filter transfer function 1/H.sub.I (z), a circuit 80 for converting the data stream Q by means of the inverse filter transfer function 1/H.sub.Q (z), a circuit 100, likewise for converting the data stream Q by means of the inverse filter transfer function 1/H.sub.Q (z), a processor I 50 for the I component, a processor IQ 70 for the IQ component, a processor QI 90 for the QI component and a processor Q 110 for the Q component of the base band signal.
The input signal A 10 is a linearly distorted, in particular echo-distorted, quadrature amplitude modulated signal in the carrier frequency range. This signal 10 is the input signal of a settable non-recursive FIR filter 20 (Final Impulse Response, transverse filter), which has the structure according to FIG. 5. The filtered output signal B 21 of this settable non-recursive FIR filter 20 is the input signal of a quadrature amplitude demodulator 30, in which case the two output signals I 31 and Q 32, which are phase-shifted relative to one another by 90 degrees in each case, are produced by splitting the input signal and multiplying one component by the carrier signal sin(w.sub.T t) and multiplying the other component by the carrier signal sin(w.sub.T t+T/2) . In this case, time constant T is the temporal spacing between two immediately adjacent symbols of the demodulated signal. One output signal I 31 of the QAM demodulator is the input signal into a circuit 40 for converting the data stream I by means of the inverse filter transfer function 1/H.sub.I (z), of [sic] a circuit 60 for converting the data stream I by means of the inverse filter transfer function 1/H.sub.I (z) and, at the same time, the output signal I of the arrangement. The component signal Q 32 is the input signal into a circuit 80 for converting the data stream I by means of the inverse filter transfer function 1/H.sub.Q (z), a circuit 100 for converting the data stream Q by means of the inverse filter transfer function 1/H.sub.Q (z) and, at the same time, the output signal Q of the arrangement. The circuits 40, 60

REFERENCES:
patent: 4247940 (1981-01-01), Mueller et al.
patent: 4759037 (1988-07-01), Debus, Jr. et al.
patent: 4831637 (1989-05-01), Lawrence et al.
IEEE Pacific Rim Conf. On Communications, Computers and Signal Processing, W.E. Mattis "A Hybrid Fractionally Spaced Digitally Controlled Equalizer", pp. 482-486, Jun. 1-2, 1989.

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