Distortion compensation circuit

Pulse or digital communications – Transmitters – Antinoise or distortion

Reexamination Certificate

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Details

C375S296000, C375S295000, C375S254000, C375S285000

Reexamination Certificate

active

10321533

ABSTRACT:
Disclosed is a distortion compensation circuit that reduces the time for convergence of distortion compensation data, without impairing any stability of distortion compensation. The circuit includes an error computation and compensation data updating section that repeats a computation in which errors between an input orthogonal baseband transmission signal and a feedback signal obtained by demodulating part of the output from a power amplifier are computed to obtain error data and values obtained by multiplying this error data by step coefficients are added to distortion compensation data before updating, thereby computing distortion compensation data after updating. Distortion compensation data for compensation of nonlinear distortion is thus updated. Step coefficients are stored in a step coefficient data memory with respect to each of different input signal amplitude values. Step coefficients corresponding to an input signal amplitude value computed by an amplitude computation section are output from the memory to multipliers.

REFERENCES:
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patent: 5396190 (1995-03-01), Murata
patent: 2001/0007435 (2001-07-01), Ode et al.
patent: 1 322 034 (2003-06-01), None
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patent: 2001-251148 (2001-09-01), None
patent: 2001-345718 (2001-12-01), None
patent: 2003-142959 (2003-05-01), None
patent: WO 01/80471 (2001-10-01), None
Error Sensitivity in Adaptive Predistortion Systems, Paolo Banelli.

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