Distortion compensating device and power amplifying device...

Amplifiers – Hum or noise or distortion bucking introduced into signal...

Reexamination Certificate

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Details

C455S114300

Reexamination Certificate

active

11045262

ABSTRACT:
One divided signal divided into two by a dividing circuit is inputted to a gate of a source grounded FET through a first matching circuit. In a drain of the FET, a second harmonic having a phase and an amplitude in accordance with an impedance of the first matching circuit is generated and extracted in a band pass filter and then the amplitude is adjusted in an attenuation circuit to input to an addition circuit through a second matching circuit. In the addition circuit, the output of the second matching circuit is added to another divided signal of the dividing circuit and inputted to a power amplifier. The impedance in the first matching circuit affecting the phase of the second harmonic generated from the FET is set so that a distortion component generated in the power amplifier is compensated for by the second harmonic inputted in the addition circuit.

REFERENCES:
patent: 6353360 (2002-03-01), Hau et al.

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