Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters
Reexamination Certificate
1996-11-14
2003-04-22
Cuneo, Kamand (Department: 2829)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Lumped type parameters
C324S754090
Reexamination Certificate
active
06552563
ABSTRACT:
TECHNICAL FIELD
The present invention relates in general to displays, and in particular, to a device for testing display panels.
BACKGROUND INFORMATION
Flat panel displays are a growth industry with projections for even greater growth into the next century. Such flat panel displays are and will be manufactured using various technologies, such as liquid crystal displays (“LCDs”), field emission displays (“FEDs”), plasma displays, displays using one or more of the aforementioned technologies, etc.
Regardless of the display technology utilized, there are typically numerous electrical contact pads located around the periphery of the display panel in order to provide an electrical path to each of the various pixel locations within the display panel. For example, in a matrix-addressable display panel, there will be several rows and columns of intersecting electrical pathways for selectively addressing the individual pixels within the display panel. Each of these rows and columns are accessible externally by corresponding pad locations. An example of such pads is illustrated in
FIG. 4
, and further described in U.S. Pat. No. 5,449,970, which is hereby incorporated by reference herein, which shows panel
101
with pixels
420
(not shown in detail) addressed via pads
202
.
During various manufacturing stages, and upon completion of the manufacturing of the display panel, various tests of the display panel are often desired to ensure the quality of the manufacturing process and the resulting end quality of the display panel. To perform such tests, there needs to be some type of interface for coupling the individual pads on the display panel to test circuitry. As a result, there is a need in the art for an improved test interface for testing of flat panel display panels.
SUMMARY OF THE INVENTION
The foregoing need is satisfied by the present invention, which includes an interface having electrical paths adaptable for coupling to display test circuitry, wherein the interface includes one or more compliant bumps mounted on the interface and connected to the electrical paths, wherein the compliant bumps are adaptable for making contact with the pads on the display panel.
The interface may be constructed of a printed circuit board (“PCB”) having electrical paths embedded thereon making contact with each one of the compliant bumps. Furthermore, the interface may have mounted thereon driver circuitry for driving the individual pixels of the display panel. The driver circuitry may be coupled to a test device controller or a computer by a ribbon cable.
The interface may also be in the form of a ring having a hole formed therein so that when the interface is mounted on the display panel, light emitted from the display panel can pass through the hole and be observed.
An advantage in incorporating compliant bumps is that sufficient electrical connection is made between each one of the pads and the compliant bumps by using pressure to adjoin the interface and the display panel despite the fact that such sufficient electrical connection may not exist at one or more interface locations between the bumps and the pads during initial contact between the interface and the display panel.
Another advantage of the present invention is that the compliant polymer that forms part of the compliant bump provides a mechanism that compensates for warp or non-planarities in the PCB substrate as well as for pad height non-uniformities. Better bump height uniformity may be achieved using the present invention than is possible with conventional techniques that electroplate solid metal bumps.
Compliant bumps also respond compliantly over a larger range of displacements than do metals. These factors allow bonding forces to be lower than with solid metal bumps. This is because there is no need for the excessive bonding forces used to plastically deform metal bumps to correct for bump non-uniformities. The present invention, accordingly permits use of a wider range of bonding perimeters while ensuring electrical conductivity between the testing interface and the display panel.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention.
REFERENCES:
patent: 3832632 (1974-08-01), Ardezzone
patent: 5329423 (1994-07-01), Scholz
patent: 5342207 (1994-08-01), Sobhani
patent: 5378982 (1995-01-01), Feigenbaum et al.
patent: 5415555 (1995-05-01), Sobhani
patent: 5434513 (1995-07-01), Fujii et al.
patent: 5489804 (1996-02-01), Pasch
patent: 5508228 (1996-04-01), Nolan et al.
patent: 5764209 (1998-06-01), Hawthorne et al.
Kumar Nalin
Potter Nathan
Yaniv Zvi
Cuneo Kamand
Kobert Russell M.
Kordzik Kelly K.
SI Diamond Technology Inc.
Winstead Sechrest & Minick P.C.
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