Valves and valve actuation – Fluid actuated or retarded – Rotary or oscillatory motor
Reexamination Certificate
2002-08-28
2004-06-01
Nelms, David (Department: 2818)
Valves and valve actuation
Fluid actuated or retarded
Rotary or oscillatory motor
C257S057000, C257S059000, C257S072000, C257S347000, C257S350000, C345S099000, C349S038000
Reexamination Certificate
active
06742762
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a display device structured by a pixel portion that uses light emitting elements such as liquid crystal elements or electroluminescence elements (EL elements), and to electronic equipment using the display device in a display portion. In particular, the present invention relates to a display device having a pixel portion and a driver circuit for driving the pixel portion formed on the same insulating surface, and to electronic equipment using the display device in a display portion.
2. Description of the Related Art
In recent years, display devices in which semiconductor thin films are formed on an insulating surface such as a glass substrate, in particular electronic circuits using thin film transistors (hereinafter referred to as TFTs), are in use in all fields. In particular, their use in display devices is common, and active matrix display devices such as LCDs (liquid crystal displays) are utilized in many products and widely adopted. Active matrix display devices using TFTs have several hundred thousand to several million pixels arranged in a matrix shape, and image display is performed by controlling the electric charge of each pixel by using TFTs disposed in each pixel.
Recently, techniques relating to polysilicon TFTs have progressed, which are used for simultaneously forming driver circuits on the same substrate by using TFTs in regions that are in the periphery of a pixel portion in addition to pixel TFTs that structure pixels. These techniques contribute greatly to making devices smaller and reducing their electric power consumption. Display devices have thus become indispensable devices used in display portions and the like on mobile information terminals, whose expanded fields of application have become remarkable in recent years.
An example of a general display device is shown in FIG.
2
A.
FIG. 2A
is an example of a liquid crystal display device in which a pixel portion and a driver circuit are integrally formed on an insulating surface. A pixel portion
201
is disposed in a center portion on a substrate
200
, and a source signal line driver circuit
202
, gate signal line driver circuits
203
, and the like are formed in the periphery of the pixel portion
201
. Note that although the gate signal line driver circuits
203
are disposed symmetrically on both right and left sides of the pixel portion
201
in
FIG. 2A
, they may also be placed on only one side. However, it is preferable to arrange the gate signal line driver circuits symmetrically as in
FIG. 2A
when considering the reliability of circuit operation, efficiency, and the like.
Signals input to the source signal line driver circuit
202
and the gate signal line driver circuits
203
are supplied from the outside through a flexible printed circuit (FPC)
204
.
An opposing electrode and the like are formed in an opposing substrate
210
, and the opposing substrate
210
and the substrate
200
are bonded through a sealing agent
205
while maintaining a certain gap. A liquid crystal material is then injected into the gap between the substrate
200
and the opposing substrate
210
from an injection port prepared in advance. The injection port is then sealed tightly by using a sealant
206
.
m source signal lines and n gate signal lines are disposed orthogonally in the pixel portion
201
as shown in FIG.
2
B. There are m source signal lines and n gate signal lines in FIG.
2
B. Locations
220
at which the source signal lines and the gate signal lines intersect form pixels as shown in FIG.
2
C. The pixel comprises a source signal line
221
, a gate signal line
222
, a pixel TFT
223
, a liquid crystal element
224
, a storage capacitor
225
, and an opposing electrode
226
. The number of pixels here is m×n pixels.
Operation of the display device is explained simply with reference to
FIGS. 5A
to
5
C. In general, screen drawing is performed on the order of 60 times per second so that pixel flicker is not recognizable by human eyes. A period denoted by reference numeral
501
, that is, a period necessary to draw the screen one time, is referred to as one frame period here (see FIG.
5
A).
Selection of the gate signal lines is performed in sequence from a first row in one frame period. A selection period
504
per one row is denoted as a horizontal period. A period
502
up until selection of the final row (number n row) is complete is denoted as a line scanning period. Similar operations are then performed in the next frame period, sandwiching a vertical return period
503
(see FIG.
5
B).
Write-in of the image signal in sequence to the pixels of the selected row is performed in one horizontal period from the source signal lines. This period, a period
505
, is denoted as a dot sampling period. A period
507
necessary for writing in an image signal to one pixel is denoted as one dot sampling period. When write-in of the image signal in one row portion of pixels is complete, similar operations are performed in the next horizontal period, sandwiching a horizontal return period
506
(see FIG.
5
C).
Specific circuit operation is explained next.
FIG. 6A
is an example of the structure of the source signal line driver circuit of the display device, and has a shift register
602
that uses a plurality of stages of flip-flops (FFs)
601
, a NAND
603
, a buffer
604
, and a sampling switch
605
. Operation is explained with reference to FIG.
6
B. The shift register
602
outputs pulses in order from the first stage in accordance with a clock signal (CK), a clock inverted signal (CKb), and a start pulse (SP).
In the case where the pulses output from the shift register
602
overlap in adjacent stages, they are input to the NAND
603
and pulses that do not overlap in adjacent stages are formed. The NAND output then passes through the buffer
604
, and becomes sampling pulses.
When the sampling pulses are input to the sampling switch
605
, the sampling switch
605
is turned on, and the electric potential of an image signal (Video) charges the source signal line connected to the sampling switch during that period. At the same time, the image signal is written into one pixel connected to the source signal line of the row whose gate signal line is selected. In
FIG. 6B
, a period denoted by reference numeral
610
is one dot sampling period.
A gate signal line driver circuit shown in
FIG. 7A
is explained next. The structure from a shift register to a buffer is nearly the same as that of the source signal line driver circuit, and the gate signal line driver circuit has a shift register
702
that comprises a plurality of stages of flip-flops
701
, a NAND
703
, and a buffer
704
.
Operation is explained with reference to FIG.
7
B. Similarly to the source signal line driver circuit, the shift register
702
outputs pulses in order from the first stage in accordance with the clock signal (CK), the clock inverted signal (CKb), and the start pulse (SP).
In the case where the pulses output from the shift register
702
overlap in adjacent stages, they are input to the NAND
703
and pulses that do not overlap in adjacent stages are formed. The NAND output then passes through the buffer
704
, and becomes gate signal line selection pulses.
As stated above, the image signal written into the source signal line is then written into each of the pixels in the row to which a gate signal line selection pulse is input. In
FIG. 7B
, a period denoted by reference numeral
710
is one horizontal period, and a period denoted by reference numeral
720
is the one dot sampling period mentioned above.
In the case where the display device has many functions, such as with a personal computer, the display device may be used in a horizontal format for certain applications, and in a vertical format in other applications. For cases such as this, there is a method of displaying in a state in which a display device frame is rotated by 90°, as shown in FIG.
3
A.
A pixel portion of an active matrix display device has m×n pi
Cook Alex McFarron Manzo Cummings & Mehler, Ltd.
Nelms David
Semiconductor Energy Laboratory Co,. Ltd.
Tran Mai-Huong
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