Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2007-02-20
2007-02-20
Shalwala, Bipin (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S094000, C345S208000
Reexamination Certificate
active
10097695
ABSTRACT:
There is provided a display device and method which is capable of securing the optimum operation thereof irrespective of an external clock signal. An input circuit receives image data input thereto. First to N-th (N≧2) storage circuits store image data input via the input circuit such that the image data is divided into respective N regions. First to M-th (M≧N) driving circuits drive respective regions M of at least part of the display block formed by dividing the at least part of the display block. An image data supply circuit reads out image data stored in each of the first to N-th storage circuits and supplies the image data to a corresponding one of the driving circuits. A clock signal generation circuit generates a clock signal for enabling image data to be read out from the first to N-th storage circuits and be supplied to the first to M-th driving circuits, in synchronism therewith.
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Greer Burns & Crain Ltd.
Piziali Jeff
Shalwala Bipin
Sharp Kabushiki Kaisha
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