Display device

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S204000, C345S094000, C345S095000, C345S097000, C345S690000, C345S208000, C345S209000, C345S210000

Reexamination Certificate

active

08031154

ABSTRACT:
A display panel is scanned every two lines during a period of binary writing area in the first half of one frame period in partial display (or in small gradation display) and a steady-state current of an output amplifier for buffering gradation signals supplied to the display panel in a non-scanning period in the second half of one frame period is reduced.

REFERENCES:
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patent: 7319453 (2008-01-01), Nojiri et al.
patent: 2002/0158857 (2002-10-01), Iisaka
patent: 2003/0169247 (2003-09-01), Kawabe et al.
patent: 2004/0183792 (2004-09-01), Takada et al.
patent: 2005/0179633 (2005-08-01), Inada
patent: 2005/0179677 (2005-08-01), Nojiri et al.
patent: 1399241 (2003-02-01), None
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patent: 1674082 (2005-09-01), None
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patent: 2003-058117 (2003-02-01), None
patent: 2005-234029 (2005-09-01), None
patent: 2006-003923 (2006-01-01), None

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